The processor in any embedded system contains various units for its successful and fast operation. Buses, memories, processing units, instructions, registers, control units are some of the structural units that an embedded processor should possess.
For quick operation, the system may have advanced processing units for superscalar and pipeline processing. Let us discuss some of the structural units in an embedded processor.
It internally connects all the structural units inside the processor. Its width can be of 8, 16, 32 or 64 bits. The internal buses include address bus, data bus and control bus. All the internal units of the processor are communicated with the external buses through an interface unit called Bus Interface Unit(BIU).
- Address bus is an external bus that carries the address from the Memory Address Register(MAR) to the memory as well as to the IO devices and other units of the system.
- Data bus is an external bus that carries the data from or to the address determined by Memory Address Register(MAR).
- Control Bus is an external bus that carries, control signals to or between the processor and memory.
The processor executes several operations with the help of a piece of code or program called instructions. All these instruction are arranged in a queue called Instruction Queue(IQ). This helps the Instruction Register to execute the instructions without the need to wait.
Instruction Register(IR) takes the instruction codes(opcodes) sequentially to the execution unit of the processor. Instruction decoder(ID) decodes the instruction opcode received at the Instruction Register and passes it to the processor Control unit for its execution..
In general, cache is the temporary storage place in the processor, where the data can easily be retrieved by the CPU for quick operation. Cache is available in your computers, laptop, mobile phone, browser, app, etc. The embedded processor has three cache memory for fast operation.
Similar to an instruction queue, Instruction Cache(I-Cache) sequentially stores the instructions in FIFO mode. It lets the processor to execute the instructions at a greater speed.
Branch Target Cache(BT Cache) facilitates the ready availability of the next instruction set, when a branch instruction like jump, call or loop is encountered. Its fetch unit foresees a branching instruction in the I – cache.
Data Cache(D – Cache) stores the pre – fetched data from the external memory. A data cache holds both the address and data together at a location. It also stores the write-through data that is to be transferred to the external memory addresses. Write-through data is nothing but the output data from the execution unit.
The control unit(CU) is one of the important structural units in an any embedded processor. It is responsible for all the control of the bus activities and unit functions needed for processing. It directs all the units of a processor to respond to the instruction that is executed.
Pre fetch control Unit(PFCU) controls the fetching of data into the I-Cache and D-Cache in advance from the memory unit. The instructions and data are delivered when needed to the processor’s execution units.
Memory Management Unit(MMU) manages the memories such that the instructions and data are readily available for processing. There are several memory management methods for managing the memory in an embedded processor such as fixed block allocation, dynamic block allocation, dynamic page allocation, etc.
Processing units receives the input data, process it and produces the output. Depending on the function of the embedded system, the processing is done through different units like ALU, FLPU, AOU and advanced units.
Arithmetic Logic Unit(ALU) is used for the execution the arithmetic and logic instructions according to the instruction present at the Instruction Register.
Floating point processing unit(FLPU) is different from ALU, used primarily for floating point processing. It is essential for fast processing mathematical functions in a microprocessor or Digital Signal Processor.
Atomic operation unit(AOU) lets a user (compiler) instruction when broken into number of processor instructions called atomic operations, finish before an interrupt of the processor occurs.
The embedded processor also has Advanced processing units for multistage pipeline processing, multi-line superscalar processing to obtain processing speeds higher than one instruction per cycle.
Application Register Set(ARS) is a set of on-chip registers used during processing of instructions of the application program of the user. A register window consists of a subset of registers with each subset storing static variables of software – routine.
System Register Set(SRS) is a set of registers used while processing the instructions of the supervisory system program.
Floating point register set(FRS) is dedicated for storing floating point numbers in the standard format and used by Floating point Processing Units for its data.
Registers are smallest part of the CPU, where the data and address can be stored and accessed quickly. There are various registers like accumulator, general purpose registers, flag registers, memory address register, memory data register, program counter, stack pointer, etc.
Memory Address Register(MAR) holds the address of the data byte or word that is to be fetched from external memories. Memory Data Register(MDR) holds the data byte or word that is fetched from external memory or stored to the external memory.
Program Counter and Stack Pointer
Program counter is a register that stores the address of the next instruction to be executed from the memory. It generates the instruction cycle to fetch the address from memory through MAR.
Stack pointer is a register that stores the address of the last program request in a stack. It is a pointer for an address which corresponds to a stack top in the memory.