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What is a decoder? Operation, types and applications

by | Last updated Oct 8, 2020 | Combinational Circuits

A decoder is a multiple-input, multiple-output combinational logic circuit. It converts the n bit data inputs into the coded 2n outputs. It decodes the information hidden by the encoder.

While decoding, the decoder generally places a logic 1 at one of its outputs to create the exact code. For a different combination of n bit binary inputs, it produces a 2n coded output. The coded output is produced based on each binary input.

The general structure of a decoder is shown below. It also has an enable input. When it is set to logic HIGH, the coded output will be seen depending on the binary data input.

general structure o a decoder

There are different type of decoders based on the number of inputs and its coded output. Some of the types are discussed below.

2 to 4 binary decoder

The 2 to 4 binary decoder has 2 binary inputs and 4 coded outputs. The block diagram and circuit diagram is shown below. A and B are the two inputs and the output produced is one of the minterms the two inputs.

2 to 4 binary decoder

The circuit diagram has two inverters, which will provide the complement of two inputs A and B. Each AND gates generates one of the minters as an output.

When Enable(EN) is set at logic 1, one of the outputs(Y0, Y1, Y2, Y3) will be active for a given input. The remaining outputs will be logic 0.

truth table of 2 to 4 binary decoder

From the above truth table, the operation can be understood. When both the inputs A and B are 0, Y0 will be at active HIGH or logic 1 and the remaining output pins are active LOW or logic 0.

Similarly, output pin Y1 will be at logic 1 for A = 0 and B = 1. The coded output for the inputs A = 1 and B = 1 is ‘1000’, where Y3 pin is at logic 1 and the remaining pins are at logic 0.

In the same way, 3 to 8 binary decoders, 4 to 16 binary decoders can be constructed. When the number of input of a decoder increases, the coded output also increases.

Cascading Decoders

Binary decoders can be cascaded together to form a larger decoder circuit. Using two 2 input decoders, 4 input decoders can be constructed, by cascading each other. Similarly, by cascading two 3 to 8 decoders, 4 to 16 binary decoder can be constructed.

Let us look at the design of 4 to 16 decoder by cascading two 3 to 8 decoder.

Cascading Decoders

To design the 4 to 16 decoders, 4 binary inputs(A, B, C, D) are needed. The three inputs A, B and C are given as input to two 3 to 8 binary decoders. The fourth input D is given as enable input(EN) to both decoders.

As you can see from the above diagram when input D = 0, the decoder at the top will be enabled and that is on the bottom will get disabled. When D = 1, it will enable the bottom decoder and disable the top one.

Decoder ICs

Some of the common ICs are IC 74138, which performs the operation of 3 to 8 decoder, IC 74139, which is a dual 2 to 4 decoder.


  • Code converters
  • Used in the memory system of computers to access a particular memory location based on the address produced by a computing device.
  • To carry out the operations in the Arithmetic Logic Unit of CPU, decoders are used to decode the program instructions to activate the control lines.



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